Semiconductor bump planning of die and chiplets during package floorplanning

Semiconductor die bump planning process flow trial

Die/chiplet bump planning

Learn how to quickly create die/chiplet bump plans with signal assignments.

Chiplet schematic

No installation required – we handle the environment for you. Try xSI and xPD today! (Chrome/Firefox/Edge/Safari recommended)

Rapid creation of die/chiplet bump arrays

Fast creation of floorplan bump arrays and associated signal assignments without the need for spreadsheets.

Smart copy and paste of signals to bumps

Copy a set of signals and/or nets from one location and paste with programmable increment patterns to multiple targets.

Smart signal-based color propagation

Quickly establish common signal colors across multiple device bump arrays based on signal names.

Trial Details

Trial features

  • Fully licensed software with sample files and guided tutorials

  • No massive downloads or lengthy installations

  • Ready to go! Instant access anytime, anywhere

Trial requirements

  • This complimentary trial is only available for qualified businesses, not members of the press or competition

  • Sign up with a valid email address, LinkedIn profile or Google account

  • Select your country/region