Designing a silicon interposer with system-on-chip (SoC) and high-bandwidth memory (HBM) stacks

Designing a 2.5D silicon interposer trial

Using Xpedition IC packaging technologies

Design a silicon interposer containing a system-on-chip (SOC) connected to high-bandwidth memories (HBMs) using the Xpedition Substrate Integrator and Xpedition Package Designer.

Layout of a superchip

No installation required – we handle the environment for you. Try xSI and xPD today! (Chrome/Firefox/Edge/Safari recommended)

Create complex design elements

Construct complex via structures and arrays along with via fanouts.

Route SoC to HBM interface

Construct HBM byte lane channels and auto-replicate them to construct a complete interface.

Construct power and ground hatching

Create intelligent power and ground hatched metal fill areas to the HBM interface.

Trial Details

Trial features

  • Fully licensed software with sample files and guided tutorials

  • No massive downloads or lengthy installations

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Trial requirements

  • This complimentary trial is only available for qualified businesses, not members of the press or competition

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